Power Aware Architecting

Thecomplexityofembeddedsystems-on-a-chipisrapidlygrowing.Di?erentexpertsareinvolvedin the design process: application software designers, programmable core architects, on-chip com- nication engineers, analog and digital designers, deep submicron specialists and process engineers. The task of the system architect is to take the correct early decisions despite the uncertainties. Power-Aware Architecting provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption. This method is illustrated with a concrete real life example of multi-carrier communication. This book is the result of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology. I strongly recommend it to any engineer, expert or specialist, who is interested in designing embedded systems-on-a-chip. Jef van MeerbergenProfessor Eindhoven University of TechnologyFellow Philips Research Eindhoven