Matrix Inversion Using QR Decomposition by Parabolic Synthesis: Method for the implementation of unary functions in hardware

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Bol Parabolic synthesis is one of the latest methodologies, proposed by Professor Peter Nilsson and Erik Hertz of EIT department at Lund University (LTH), for the implementation of unary functions in hardware. In the preceding research conducted at Lund University, it had been shown that parabolic synthesis is an effective solution, which is both fast and consumes less area compared to all the existing methods.The goal of this Master's thesis is to develop hardware for the generation of three trigonometric functions (+sine, -sine and +cosine) using the novel approximation methodology, which is based on Parabolic synthesis, for the use in Givens rotations for implementing matrix inversion using QR decomposition. Two hardware designs has been developed, one for the parabolic synthesis and another for matrix inversion but due to time limitations the two hardware designs could not be integrated together. The paper mainly focuses on the implementation of the three trigonometric functions on both FPGA and ASIC and compares the result with metrics of speed and area and later a hardware solution for the overall system has been proposed.

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Parabolic synthesis is one of the latest methodologies, proposed by Professor Peter Nilsson and Erik Hertz of EIT department at Lund University (LTH), for the implementation of unary functions in hardware. In the preceding research conducted at Lund University, it had been shown that parabolic synthesis is an effective solution, which is both fast and consumes less area compared to all the existing methods.The goal of this Master's thesis is to develop hardware for the generation of three trigonometric functions (+sine, -sine and +cosine) using the novel approximation methodology, which is based on Parabolic synthesis, for the use in Givens rotations for implementing matrix inversion using QR decomposition. Two hardware designs has been developed, one for the parabolic synthesis and another for matrix inversion but due to time limitations the two hardware designs could not be integrated together. The paper mainly focuses on the implementation of the three trigonometric functions on both FPGA and ASIC and compares the result with metrics of speed and area and later a hardware solution for the overall system has been proposed.

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Pages: 64, Paperback, LAP Lambert Academic Publishing


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Merk LAP LAMBERT Academic Publishing
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  • 9786209803376
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