Independently Published

ASIC Design ENGINEERING: Digital Architecture RTL Verification Synthesis Physical Timing and Chip Implementation

Name: ASIC Design ENGINEERING: Digital Architecture RTL Verification Synthesis Physical Timing and Chip Implementation
Brand: Independently Published
SKU: c59f81d1d545438cf787aafa5431d855

1/1

Afbeelding van ASIC Design ENGINEERING: Digital Architecture RTL Verification Synthesis Physical Timing and Chip Implementation

Amazon

Prijzen vanaf

11,79

Uitgelicht

	11,79	Naar shop
	11,79	Naar shop
VERGELIJK ALLE AANBIEDERS (2)

Beschrijving

ASIC Design ENGINEERING: Digital Architecture RTL Verification Synthesis Physical Timing and Chip Implementation

Vergelijk aanbieders (2)

Shop

Prijs

Verzendkosten

Totale prijs

11,79

Gratis

11,79

Naar shop

Gratis

11,79

Gratis

11,79

Naar shop

Gratis

Beschrijving (0)

ASIC Design ENGINEERING: Digital Architecture RTL Verification Synthesis Physical Timing and Chip Implementation

Productspecificaties

Merk	Independently Published
EAN	9798194141203

LEARNCORP

RTL to GDSII: A Complete Guide ASIC Design and Physical Implementation

17,64

Vergelijk 2 shops 2 shops

Independently Published

CHIP Design and Verification ENGINEERING: RTL SystemVerilog FPGA Prototyping Digital Logic Semiconductor Development

12,82

Vergelijk 2 shops 2 shops

Independently Published

Modern Digital Design Engineering: From Boolean Logic to SystemVerilog, FPGA Implementation, Verification, and Timing

119,33

Vergelijk 2 shops 2 shops

Independently Published

Modern Digital Design Engineering: From Boolean Logic to SystemVerilog, FPGA Implementation, Verification, and Timing

85,99

Vergelijk 3 shops 3 shops

Populair nu

Categorieën

Populaire categorieën

Merken

Verkopers

Populaire categorieën

ASIC Design ENGINEERING: Digital Architecture RTL Verification Synthesis Physical Timing and Chip Implementation

Beschrijving

Productspecificaties